-2014.02 KAIST, Electrical Engineering (Ph.D.)
-2010.02 KAIST, Electrical Engineering (M.S.)
-2008.02 Yonsei University, Electrical Engineering (B.S.)

- 2022.02 - Present Seoul National Univ. of Science and Technology (Assistant Professor)
- 2014.02 – 2022.01 SK Hynix (Senior Engineer)

- Surface-controlled Ultrathin (2 nm) Poly-Si Channel Junctionless FET towards 3D NAND Flash Memory Applications, Symposium on VLSI Technology, 2014
- Origin of transient Vth shift after erase and its impact on 2D/3D structure charge trap Flash memory cell operations, International Electron Devices Meeting (IEDM), 2012
- Dramatic Improvement of high-K Gate Dielectric Reliability by Replacing Metal Gate Electrode with Mono-Layer Graphene, Symposium on VLSI Technology, 2012
- Graphene Gate Electrode for MOS Structure Based Electronic Devices, Nano Lett., vol. 11, no.12, pp. 5383-5386, 2011

- A Review of Cell Operation Algorithm for 3D NAND Flash Memory, Applied Sciences, vol. 11, no. 21, pp. 10697, 2022
- Dependence of grain size on the performance of a polysilicon channel TFT for 3D NAND flash memory, J. Nanosci. & Nanotech., vol. 16, no. 5, pp. 5044-5048, 2015
- Improvement of the multi-level cell performance by a Soft Program Method in Flash Memory Devices, Solid State Electron., vol. 94, pp. 86-90, 2014
- Comparative Study of Chemically Synthesized and Exfoliated Multilayer MoS2 Field Effect Transistors, Appl. Phys. Lett., vol. 102, pp. 043116, 2013
- Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer, Appl. Phys. Express, vol. 5, pp. 081102-1~081102-3, 2012
- Determination of Work Function of Graphene under a Metal Electrode and Its Role in Contact Resistance, Nano Lett., vol.12, no.8, pp 3887-3892, 2012
- Graphene Gate Electrode for MOS Structure Based Electronic Devices, Nano Lett., vol. 11, no.12, pp. 5383-5386, 2011
- Lanthanum-Oxide-Doped Nitride Charge Trap Layer for a TANOS Memory Device, IEEE Trans. Electron Devices, vol. 58, no. 10, pp. 3314-3320, 2011
- Mechanism of Date Retention Improvement by High Temperature Annealing of Al2O3 Blocking Layer in Flash Memory Device", Jpn. J. Appl. Phys., vol. 50, no. 4, pp. 04DD07-1-04DD07-5, 2011
- Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device, Appl. Phys. Express, vol. 3, no. 20, pp. 091501-1-091501-3, 2010
- Improvement of Memory Performance by High Temperature Annealing of the Al2O3 Blocking Layer in a Charge-Trap Type Flash Memory Device, Appl. Phys. Lett., vol. 96, no. 22, pp. 222902-1-222902-3, 2010
- Structural and Compositional Dependence of Gadolinium-Aluminum Oxide for the Application of Charge-Trap-Type Non-Volatile Memory Devices, Appl. Phys. Lett., vol. 96, no. 5, pp. 052907-1-052907-3, 2010

- Jong Kyung Park, Seung-Yoon Kim, Ki-Hong Lee, Seung Ho Pyi, Seok-Hee Lee, and Byung Jin Cho, "Surface-controlled Ultrathin (2 nm) Poly-Si Channel Junctionless FET towards 3D NAND Flash Memory Applications", Symposium on VLSI Technology, Hawaii, USA, June 9-13, 2014
- 박종경, 이석희, 이기홍, 피승호, 조병진, "플래쉬 메모리 소자에서의 초기 VT 불안정 현상 개선에 관한 연구", 20th Korean Conference on Semiconductors, Hoengsung,
Korea, Feb 4-6, 2013
- 송승민, 박종경, 설원제, 조병진, "그래핀의 work-function 변이에 관한 연구", 20th
Korean Conference on Semiconductors, Hoengsung, Korea, Feb 4-6, 2013.
- Jong Kyung Park, Seok-Hee Lee, Ki-Hong Lee, Seung Ho Pyi, and Byung Jin Cho, " Dramatic Increase of Dielectric Constant of Al2O3 by Very Light Doping of La and Thermal Treatment and Its Application to Flash Memory Device ", 19th Korean Conference on Semiconductors, Seoul, Korea, Feb. 2012
- BJ Cho, SM Song, and JK Park, "Issues on Metal Contact and Gate Electrode of Graphene Based FET", The 4th International Conference on Recent Progress in Graphene Research (RPGR) 2012, p. 26, Beijing, China, Oct. 3-6, 2012 (Invited)
- Jong Kyung Park, Dong-Il Moon, Yang-Kyu Choi, Seok-Hee Lee, Ki-Hong Lee, Seung Ho Pyi, and Byung Jin Cho, "Origin of transient Vth shift after erase and its impact on 2D/3D structure charge trap Flash memory cell operations", International Electron Devices Meeting, San Francisco, CA, USA, Dec. 10-12, 2012
- Jong Kyung Park, Seung Min Song, Jeong Hun Mun, and Byung Jin Cho, "Dramatic Improvement of high-K Gate Dielectric Reliability by Replacing Metal Gate Electrode with Mono-Layer Graphene", Symposium on VLSI Technology, Hawaii, USA, Jun. 12-15, 2012
- Jong Kyung Park, Seung Min Song, Jeong Hun Mun, and Byung Jin Cho, "Graphene Gate Electrode for Advanced Silicon-Based CMOS Devices", Graphene Week 2012, Delft, Netherlands, Jun. 4-8, 2012
- 송승민, 박종경, 조병진, "금속/그래핀/산화막/반도체 구조에서 그래핀이 커패시턴스에 미치는 영향", 2011 Korean Carbon Society Spring Meeting, Seoul, Korea, May 19-20. 2011
- Jong Kyung Park, Youngmin Park, Seok-Hee Lee, Sung Kyu Lim, Jae Sub Oh, Moon Sig Joo, Kwon Hong, and Byung Jin Cho, "Enhancement of High temperature Data Retention by La2O3-Doped Nitride for Charge-Trap Type Flash Memory Device", 18th Korean Conference on Semiconductors, Jeju, Korea, Feb. 2011
- Jong Kyung Park, Youngmin Park, Sung Kyu Lim, Jae Sub Oh, Moon Sig Joo, Kwon Hong, and Byung Jin Cho, “In-Depth Study on Mechanism of the Performance Improvement by High Temperature Annealing of the Al2O3 in a Charge-Trap Type Flash Memory Device", International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, Sep. 22-24, 2010

- NONVOLATILE MEMORIES-Materials, Devices and Applications (Chapter 9 “Application of a High-k Dielectric for a Flash-Memory Device”), Jong Kyung Park, Tseung-Yuen Tseng, Simon M. Sze, and Byung Jin Cho, AMERICAN SCIENTIFIC PUBLISHERS, 2012

- Semiconductor memory device and method of operating the same. US patent, 11328766, 2022.
- Memory device capable of improving a threshold voltage distribution of memory cells and method of operating the memory device. US patent, 11217317, 2022.
- Semiconductor device and operating method of a semiconductor device. US patent, 10930331, 2021.
- 메모리 장치 및 이의 동작 방법(Memory device and method of operating the same), 1020190091216, 2019
- 반도체 장치 및 반도체 장치의 동작 방법(SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE), 1020190068167, 2019
- 반도체 메모리 장치 및 그 동작 방법(SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF), 1020190140458, 2019
- 반도체 메모리 장치 및 이의 동작 방법(SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF), 1020160037530, 2016
- NON-VOLATILE MEMORY DEVICE AND MOSFET USING GRAPHENE GATE ELECTRODE, US patent, 13,342,282, 2012
- 반도체 장치의 박막 형성 방법(METHOD FOR FABRICATING THIN FILM IN SEMICONDUCTOR DEVICE), 1020110068442, 2011
- 비휘발성 메모리 소자 및 그 제조 방법(NON-VILATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME), 1020100013637, 2010

- Study on Characteristics of Interface between Polysilicon Channel and Tunnel Oxide in 3D Flash Memory Device, SK Hynix, 2013 – 2014
- Study on Juntionless Charge Trap Device for 3D NAND Flash Memory, SK Hynix, 2012-2013
- Device Operation Modeling for Retention Improvement of CTF Flash Memory, SK Hynix, 2011-2012
- Improvement of Data Retention of Flash Memory Using ALD charge trap layer, SK Hynix, 2010-2011
- Development of composite element implementation technology for organic and inorganic nanomaterials, Ministry of Education, Science and Engineering, 2009-2014
- Development of high-K dielectric process for Flash memory, SK Hynix, 2008-2010

<활동>
- Advisory Professor, Samsung Electronics Future Technology Committee
- Editorial Director, The Korean Microelectronics and Packaging Society (KMEPS)


<수상>
- Annual Research Performance Excellence Award, KAIST, 2013
- Top 10 New Breakthrough Technology, KAIST, 2011